PCIe Gen 4 x16 lanes Loopback test board


Key Features:

  • PCIe FPGA board testing during development
  • PCIe board electrical validation
  • PCIe board testing at assembly facilities

Ordering Code:


The PCIe Gen 4 x16 lanes loopback tester board enables developers and assembly factories to test and characterize the PCIe board interfaces. The board features full differential loopbacks on all the PCIe signals and the JTAG interface. It also provides a 100MHz reference clock as per PCIe specification. The PCIe loopback card is designed for signal integrity to support the Gen4 speed of differential lanes.


  • Provides loopbacks on differencial signals
  • JTAG interface
  • Reset button
  • 100MHz reference clock

Block diagram


  • PCIe loopback test board

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